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JTAG Boundary-Scan Benefits FAQ

Learn some facts on how you can benefit from JTAG and JET technology.


 JTAG Boundary-Scan Benefits FAQ

Why use JTAG?

There is an increased demand for JTAG due to some of the following:

  • PC boards are becoming more complex

    • Loss of physical/electrical access decreases
      effectiveness of Bed of Nails test technologie

    • Smaller, multilayer, internal vias, dual-sided placement, BGAs, more complex devices

  • Product life cycles are becoming shorter

    • Minimize time from design to volume manufacturing

  • Device packaging density and lack of access makes physical access

    • Expensive

    • Unreliable

    • Impossible

  • Increased Board Density

  • In-System Programming


What are the benefits and advantages of JTAG?

  • JTAG provides the capability to test interconnects on a PC-board without physical test probes or test fixtures

  • Does not require the board to be in a bootable state for fault diagnostics

  • JTAG allows In-System Programming of devices such as Flash, CPLDs, FPGAs and Serial EEPROMs

  • Automated test development for DSP initialization, memory and flash

  • Device level diagnostics

  • Customized diagnostic messages

  • JET rigorously exercises all external memory locations before execution of any boot code

  • Test vectors can be reused in production


What are the benefits and advantages of JET?

  • Does not require the board to be in a bootable state for fault diagnostics

  • Embedded tests are downloaded and run from on-chip DSP memory at-speed

  • Provides testability on all DSP addressable components by exercising their functionality

  • In-system programming at theoretical speeds reduces time waiting for code to download

  • Automated test development for DSP initialization, memory and flash

  • Device level diagnostics

  • Customized diagnostic messages

  • JET rigorously exercises all external memory locations before execution of any boot code

  • Test vectors can be reused in production


What fault coverage does JTAG and JET provide?

  • JTAG Pin Connectivity; Noisy Signals

  • Opens, Shorts & Stuck-At Conditions

  • DSP Initialization

  • Component Discovery and Identification

  • Bad Memory Locations

  • Flash Communication Problems

  • Timing Problems

 

     

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