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Design for Test Guidelines and Considerations


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Improving Test Coverage

100% test coverage is what everyone strives for, but is extremely difficult and expensive to achieve. These suggestions will help anyone looking to add test coverage into their products using boundary-scan testing.



The ScanIO-300LV module provides a total of 300 fully bidirectional test channels with virtually unlimited memory depth per pin. Each line is independently controlled and can be individually configured as an input or output. During testing, the programming and control of the test channels is automatically performed by the ScanExpress™ tools without any user intervention. The voltage level of the I/O and JTAG interfaces is programmable from 1.25V to 3.3V and supports either single ended or low voltage differential (LVDS) signaling.




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Even for those PCI and Compact PCI cards that have been designed with boundary-scan testing in mind, the circuitry between the PCI or Compact PCI card edge itself and the PCI interface devices, which typically have JTAG capability, is usually not fully boundary-scan testable. The Corelis ScanPCI™ provides a way to quickly and easily access these hard to reach connections and increase the boundary-scan test coverage of the Unit Under Test (UUT).



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Through the use of boundary-scan technology, the ScanDIMM Tester provides fully bi-directional test signals. A boundary-scan Test Access Port (TAP) connects to a host computer which provides virtually unlimited memory depth for testing each of the DIMM socket(s) pins.



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Transceiver Testing

Transceiver Testing


Loopback Cables

Loopback Cables


Cluster Testing

  • Clock Oscillators

    • Single Alternating Test Vector

    • Use Re-run Test Step if Failed Option in ScanExpress Runner

  • Real Time Clocks

    • Two separate cluster tests

    • 1st cluster test sets the seconds register on RTC

    • 2nd cluster test reads and compares the seconds register after a specific amount of time

    • Use Stop on Last Test Vector and Wait Option in ScanExpress Runner on 1st cluster test

  • UART

    • Setting and reading UART registers

    • Loopback testing TXD/RXD lines

  • RS-232 / RS-485 Transmitters / Receivers

    • Loopback testing TXD/RXD lines

  • Logic Gates

    • Simple truth table based on inputs and outputs

  • ADC / DAC

    • Can be performed as a stand-alone test or loopback

    • Cluster test sets the DAC value and analog meter takes measurement

    • Analog source sets the ADC value and boundary-scan compares result

    • Reliable testing for MSB data pins within device accuracy

  • SPI / I2C Devices

    • Complete control of device functionality

  • NAND and XOR Tree

    • Every pin must be controllable by a JTAG device

  • LEDs & Lamps

    • Visual Inspection


Script Testing

  • Scripting is more flexible than Cluster tests

    • Using C-like language and many C-like functions

  • Read and write to/from files

  • Use of loops and conditions based on results of tests

  • Store global variables to use in another (or later) script test

  • Use of sub-routines and/or include functions

    • Easy way of reusing existing functions



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Design engineers will benefit by implementing a boundary-scan friendly design.


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