Design Engineers Role in Boundary-Scan Test
One common misconception about
boundary-scan test is that it is completely the responsibility
of the test or manufacturing department. Unlike in-circuit
testers (ICT), boundary-scan design problems cannot be resolved
by simply adding a few more test points to the board.
Boundary-scan testing utilizes a whole new set of design
constraints that need to be taken into consideration before a
board goes to layout.
The following is a short list of
items that should be considered up front:
Use fully compliant IEEE-1149.1
Verify that the boundary-scan parts
for non-compliant behavior.
Correctly design the scan-chain
including trace layout and routing.
Use fan-out buffering for TCK and
Terminate the boundary-scan signal
on the board for signal integrity.
Verify that BSDL files are
available and tested.
Provide external connector access
to the scan-chain.
Allow control to disable
Allow programmable devices to be
tested while they are erased or not configured.
Ensure boundary-scan control of
clock pins for memory tests.
Board designers should not see this
list as extra work because they can actually take advantage of
boundary-scan testing themselves by using it to assist in
debugging of their prototype designs. When a prototype board
first arrives from the assembly house, the first thing the
engineer does is to visually inspect it to make sure components
are installed correctly, make sure there are no obvious shorts
or opens, check it for proper impedance between the voltage
rails and ground, and probably apply some current-limited power
to ensure nothing gets hot.
At some point the designers will
try to load some executable code to see if the board boots
properly. If the board doesn't boot properly, the designer will
likely spend a considerable amount of time troubleshooting which
may eat up precious weeks in getting the product released.
Boundary-scan testing can actually help the design engineer by
ensuring the board is free from manufacturing related defects.
The following list represents some
of the benefits that design engineers will receive by
implementing a boundary-scan friendly design:
Boundary-scan tests can be
executed on boards that do not boot or are partially bootable.
Boundary-scan is a fixtureless
test. There is no need for the designer to add a large number of
Boundary-scan provides detailed
diagnostics down to the pin and net level so engineers are
immediately aware of where prototype problems are located.
Boundary-scan helps build the
design engineer's confidence when the interconnect test passes.
Boundary-scan test vectors used by
the design engineers can be reused in production. The time saved
can eliminate redundant work and reduce cost.
It is important to realize that
although boundary-scan is a test methodology, design engineers
should not isolate themselves from the process and leave it
entirely up to the test engineering department to implement. By
spending some time and effort up front, designers can help save
time in their own board bring-up while easing effort in the
manufacturing and test departments as well. This presents a
win-win situation for any company utilizing boundary-scan test.